| Description of the error | |
|---|---|
| 1 short | Successful POST |
| 1 beep and blank screen | Video system is faulty |
| 2 short | Video system is faulty |
| 3 long | Faulty motherboard(keyboard controller error), non-contact random access memory |
| 1 long, 1 short | Motherboard is faulty |
| 1 long, 2 short | Video system faulty (Mono/CGA) |
| 1 long, 3 short | Video system (EGA/VGA) is faulty |
| Repeating short | Faults are related to the power supply or motherboard |
| Continuous | Problems with the power supply or motherboard |
| Absent | The power supply, motherboard, or speaker is faulty |
| Sequence of beeps | Description of the error |
|---|---|
| 1 short | Successful POST |
| 2 short | Minor errors found. A prompt appears on the monitor screen to enter the CMOS Setup Utility program and correct the situation. Check the reliability of the cables in the connectors hard drive and motherboard. |
| 3 long. | Keyboard controller error |
| 1 short, 1 long. | Random access memory (RAM) error |
| 1 long, 2 short | Video card error |
| 1 long, 3 short. | Keyboard error |
| 1 long, 9 short. | Error reading from ROM |
| Repeating short |
|
| Repeating long. | RAM problems |
| Repeated high-low frequency. | CPU problems |
| Continuous. | Problems with the power supply |
| Sequence of beeps | Description of the error |
|---|---|
| 1 short | No errors found, PC is working fine |
| 2 short | RAM parity error or you forgot to turn off the scanner or printer |
| 3 short | Error in the first 64 KB of RAM |
| 4 short | System timer malfunction. Replace the motherboard. |
| 5 short | Processor problems |
| 6 short | Keyboard controller initialization error |
| 7 short | Problems with the motherboard |
| 8 short | Video card memory error |
| 9 short | BIOS checksum is incorrect |
| 10 short | CMOS write error |
| 11 short | Error in the cache located on the motherboard |
| 1 long, 1 short | Problems with the power supply |
| 1 long, 2 short | Video card error (Mono-CGA) |
| 1 long, 3 short | Video card error (EGA-VGA) |
| 1 long, 4 short | No video card |
| 1 long, 8 short | Problems with the video card or the monitor is not connected |
| 3 long | RAM - read/write test completed with error. Reinstall memory or replace with a working module. However, hardware items show a different screen with additional information about them when accessed. Again, you can disable them completely, set them to automatically detect each download, or manually assign a recording status. This last manual method is useful so that your system no longer wastes time during startup to find devices that are already installed again. On the other hand, in automatic mode, you can change components or even reposition existing ones without worrying about reusing elements. |
| Missing and blank screen | The processor is faulty. The contact leg of the processor may be bent (broken). Check the processor. |
| Continuous beep | The power supply is faulty or the computer is overheating |
| Sequence of beeps | Description of the error |
|---|---|
| 1 short | Error when checking processor registers. Processor failure |
| 2 short | Keyboard controller buffer error. Keyboard controller malfunction. |
| 3 short | Keyboard controller reset error. The keyboard controller is faulty or motherboard. |
| 4 short | Keyboard communication error. |
| 5 short | Keyboard error. |
| 6 short | System board error. |
| 9 short | BIOS ROM checksum mismatch. The BIOS ROM chip is faulty. |
| 10 short | System timer error. The system timer chip is faulty. |
| 11 short | Chip error system logic(chipset). |
| 12 short | Power management register error in non-volatile memory. |
| 1 long | DMA controller error 0. The channel 0 DMA controller chip is faulty. |
| 1 long, 1 short | DMA controller error 1. The channel 1 DMA controller chip is faulty. |
| 1 long, 2 short | Frame retrace suppression error. The video adapter may be faulty. |
| 1 long, 3 short | Error in video memory. The memory of the video adapter is faulty. |
| 1 long, 4 short | Video adapter error. The video adapter is faulty. |
| 1 long, 5 short | Memory error 64K. |
| 1 long, 6 short | Failed to load interrupt vectors. BIOS was unable to load interrupt vectors into memory |
| 1 long, 7 short | The video subsystem failed to initialize. |
| 1 long, 8 short | Video memory error. |
| Sequence of beeps | Description of the error |
|---|---|
| 1-1-2 | Error during processor test. The processor is faulty. Replace the processor |
| 1-1-3 | Error writing/reading data to/from CMOS memory. |
| 1-1-4 | An error was detected while calculating the checksum of the BIOS contents. |
| 1-2-1 | |
| 1-2-2 or 1-2-3 | DMA controller initialization error. |
| 1-3-1 | Error in initializing the RAM regeneration circuit. |
| 1-3-3 or 1-3-4 | Error initializing the first 64 KB of RAM. |
| 1-4-1 | Motherboard initialization error. |
| 1-4-2 | |
| 1-4-3 | |
| 1-4-4 | Error writing/reading to/from one of the I/O ports. |
| 2-1-1 | An error was detected when reading/writing bit 0 (in hexadecimal) of the first 64 KB of RAM |
| 2-1-2 | An error was detected when reading/writing the 1st bit (in hexadecimal) of the first 64 KB of RAM |
| 2-1-3 | An error was detected when reading/writing the 2nd bit (in hexadecimal) of the first 64 KB of RAM |
| 2-1-4 | An error was detected when reading/writing the 3rd bit (in hexadecimal) of the first 64 KB of RAM |
| 2-2-1 | An error was detected while reading/writing the 4th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-2-2 | An error was detected when reading/writing the 5th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-2-3 | An error was detected when reading/writing the 6th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-2-4 | An error was detected when reading/writing the 7th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-3-1 | An error was detected while reading/writing the 8th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-3-2 | An error was detected when reading/writing the 9th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-3-3 | An error was detected when reading/writing the 10th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-3-4 | An error was detected when reading/writing the 11th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-4-1 | An error was detected while reading/writing the 12th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-4-2 | An error was detected when reading/writing the 13th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-4-3 | An error was detected when reading/writing the 14th bit (in hexadecimal) of the first 64 KB of RAM |
| 2-4-4 | An error was detected when reading/writing the 15th bit (in hexadecimal) of the first 64 KB of RAM |
| 3-1-1 | Error initializing the second DMA channel. |
| 3-1-2 or 3-1-4 | Error initializing the first DMA channel. |
| 3-2-4 | |
| 3-3-4 | Error initializing video memory. |
| 3-4-1 | Serious problems arose when trying to access the monitor. |
| 3-4-2 | The video card BIOS cannot be initialized. |
| 4-2-1 | Error initializing the system timer. |
| 4-2-2 | Testing is complete. |
| 4-2-3 | Keyboard controller initialization error. |
| 4-2-4 | Critical error when the CPU enters protected mode. |
| 4-3-1 | Error initializing RAM. |
| 4-3-2 | Error initializing the first timer. |
| 4-3-3 | Error initializing the second timer. |
| 4-4-1 | Error initializing one of the serial ports. |
| 4-4-2 | Parallel port initialization error. |
| 4-4-3 | Error initializing math coprocessor. |
| Long, continuous beeps | The motherboard is faulty. |
| Siren sound from high to low frequency | The video card is faulty, check the electrolytic capacitors for leaks or replace everything with new ones that are known to be good. |
| Continuous signal | The CPU cooler is not connected (faulty). |
| Sounds | Description |
|---|---|
| 1 short | |
| 1 long + 1 short | BIOS CMOS memory checksum error. The ROM battery may have run out. |
| 2 short | Global error. |
| 1 long + 2 short | Error initializing video card. Check that the video card is installed correctly. |
| 7 beeps (1 long, 1 s, 1?, 1 short, pause, 1 long, 1 short, 1 short) | AGP video card malfunction. Check that the installation is correct. |
| 1 long constant | RAM error, try rebooting. |
| 1 short + 2 long | RAM malfunction. Reboot via Reset. |
BIOS error codes and processes
American Megatrends, Inc. (AMI)
Checkpoints POST procedures, executed in AMIBIOS, were revised and supplemented in 1995 and have not undergone significant changes to date. The first description of POST codes or, as AMI calls them, “check points” in their current form appeared in connection with the release of the V6.24 kernel, 07/15/95. Some changes have been made to AMIBIOS V7.0, which are reflected in this document.
Here you define how long the system waits to detect the device and the operating mode hard drives. Moving to the bottom of the screen, we have the System Information option: Think of this as a more comprehensive display of computer data than the system view, as it brings you the processor type and model, as well as the machine's total memory, followed by free amount and already occupied by other devices, for example, on-board video cards.
How it works
Advanced settings for built-in devices and ports. Please note that your board may use a different term or may not have some of the following options as they rely primarily on having onboard components. The first option is for advanced users to adjust the processor power and speed. We don't recommend changing anything here unless you really know what you're doing.
Features of performing AMIBIOS startup procedures
If during the startup process the data 55h, AAh appears in the diagnostic port, you should not compare this information with POST codes - we are dealing with a typical test sequence, the task of which is to check the integrity of the data bus.
At the start stage, the output to the diagnostic port of data is specific to each platform. In some implementations, the first code rendered is associated with actions, which AMI calls chipset specific stuff. This procedure is accompanied by outputting the CCh value to port 80h and performing a number of actions to configure the system logic registers. As a rule, the CCh code appears in cases where system logic from Intel is used, built on the basis of the PIIX controller - these are TX, LX, BX chipsets.
Returning to the main Advanced tab screen, we also have processor configurations that show cache memory, virtualization, and thermal management, as well as other custom technologies for each processor and manufacturer. But the most important option here is the configuration of the embedded devices. All these elements can be activated or deactivated according to your needs.
Audio controllers usually have settings operating system and front panel for high definition audio. If a separate board is installed, it is recommended to disable integration to avoid conflicts and system locks. Energy for your components!
Some on-board I/O chips contain an RTC and a keyboard controller, which are disabled at startup. The purpose of the BIOS is to initialize these board resources for further use. In this case, the first starting procedure associated with the keyboard controller setting is accompanied by the output of the value 10h, then the RTC is initialized, as evidenced by the appearance of the DDh code in the diagnostic port. It should be noted that the failure of at least one of these resources will result in a non-start of the system board as a whole at the very first stage of POST execution.
Fatal Error Messages
Now that you've configured all your onboard components correctly, it's time to check your basic power settings. Some of the options in this guide include the hibernation method and how the computer should be turned on. Some boards can even be configured to turn on the power again in the event of a power outage as soon as distribution is restored.
Another tool often available through the power guide is monitoring, which monitors and shows real-time data such as CPU, motherboard and memory temperatures, voltage received by components, and speed of fans connected to the board rather than body.
On a number of boards, the initialization process begins with the CPU switching to protected mode. In this case, following the first rendered code 43h, the POST execution continues as described in the AMIBIOS documentation - control is transferred to point D0h.
Uncompressed Init Code Check Points
| Error code | Description of the error |
|---|---|
| E.E. | In modern AMIBIOS implementations, the first code rendered is associated with accessing the device from which it is possible to boot to restore the BIOS |
| CC | Initializing system logic registers CD Flash ROM type not recognized |
| C.E. | Checksum mismatch in the starting BIOS CF Error in accessing the spare Flash ROM chip |
| DD | Early initialization of the RTC, which is integrated into the SIO chip |
| D0 | Disable non-maskable NMI interrupt. Testing the time delay for attenuation of transient processes. Checking the Boot Block checksum, stopping if there is a mismatch |
| D1 | Perform memory regeneration procedure and Basic Assurance Test. Switching to 4 GB memory addressing mode |
| D3 | Determination of capacity and primary memory test |
| D4 | Return to real memory addressing mode. Early initialization of the chip set. Stack Installation |
| D5 | Transferring the POST module from Flash ROM to the transit memory area |
| D6 | If the checksum does not match or CTRL+Home, a transition to the Flash ROM recovery procedure is performed (Code E0) |
| D7 | Transferring control to a utility program that unpacks the system BIOS |
| D8 | Full unboxing system BIOS |
| D9 | Transferring system BIOS control to Shadow RAM |
| D.A. | Reading information from SPD (Serial Presence Detect) DIMM DB modules Setting MTRR of CPU registers |
| DC | The memory controller is programmed according to data received from SPD DE System memory configuration error. Fatal error |
| DF | System memory configuration error. Beep 10 Early |
| 11 | Return from STR (Suspend to RAM) state |
| 12 | Restoring access to SMRAM (System Management RAM) |
| 13 | Memory regeneration restoration |
| 14 | Finding and initializing VGA BIOS |
Flash ROM rewrite procedure codes (Boot Block Recovery Codes)
| Error code | Description of the error |
|---|---|
| E0 | Preparations are being made to intercept INT19 and the ability to start the system in simplified mode is checked. |
| E1 | Setting interrupt vectors |
| E3 | Recovering CMOS contents, searching and initializing BIOS |
| E2 | Preparing interrupt controllers and direct memory access |
| E6 | Enable system timer and FDC interrupts |
| E.C. | Reinitializing IRQ and DMA ED controllers Initializing the disk drive |
| E.E. | Reading boot sector from EF floppy Disk operation error |
| F0 | Finding the AMIBOOT.ROM file |
| F1 | The file AMIBOOT.ROM was not found in the root directory F2 Read FAT |
| F3 | Reading AMIBOOT.ROM |
| F4 | The size of the AMIBOOT.ROM file does not match the size of the Flash ROM |
| F5 | Disabling Internal Cache |
| FB | Flash ROM Type Definition |
| F.C. | Erasing the main Flash ROM block |
| FD | Programming the main Flash ROM block |
| FF | Restart BIOS |
Codes of the unpacked system BIOS, executed in ShadowRAM (Runtime code is uncompressed in F000 shadow RAM)
| Error code | Description of the error |
|---|---|
| 03 | Disable non-maskable NMI interrupt. Reset Type Definition |
| 05 | Stack initialization. Disable memory and USB controller caching |
| 06 | Executing a utility program in RAM |
| 07 | Processor recognition and APIC initialization |
| 08 | Checking the CMOS checksum |
| 09 | Checking the operation of the End/Ins keys |
| 0A | Battery failure check |
| 0B | Clearing the keyboard controller buffer registers |
| 0C | A test command is sent to the keyboard controller |
| 0E | Finding additional devices supported by the keyboard controller |
| 0F | Initializing the keyboard |
| 10 | A reset command is sent to the keyboard |
| 11 | If the End or Ins key is pressed, the CMOS 12 is reset. Placing the DMA controllers in a passive state. |
| 13 | Chipset initialization and L2 cache |
| 14 | Checking the system timer |
| 19 | DRAM regeneration request generation test is running |
| 1A | Checking the duration of the regeneration cycle |
| 20 | Initializing Output Devices |
| 23 | The keyboard controller input port is read. Keylock Switch and Manufacture Test Switch are interrogated |
| 24 | Preparing to initialize the interrupt vector table |
| 25 | Interrupt vector initialization complete |
| 26 | The status of the Turbo Switch jumper is polled through the keyboard controller input port |
| 27 | Primary. Updating the microcode of the starting processor |
| 28 | Preparing to install video mode |
| 29 | Initializing the LCD panel |
| 2A | Search for devices supported by additional ROMs |
| 2B | Initializing VGA BIOS, checking its checksum |
| 2C | Executing VGA BIOS |
| 2D | Matching INT 10h and INT 42h |
| 2E | Search for CGA video adapters |
| 2F | CGA adapter video memory test |
| 30 | Test of CGA adapter scan generation circuits |
| 31 | Error in video memory or scanning circuits. Finding an alternative CGA video adapter |
| 32 | Test of video memory of an alternative CGA video adapter and scan circuits |
| 33 | Poll the status of the Mono/Color jumper |
| 34 | Setting text mode 80x25 |
| 37 | Video mode is set. Screen cleared |
| 38 | Initialization of on-board devices |
| 39 | Displaying error messages from the previous step |
| 3A | Displaying the “Hit DEL” message to enter CMOS Setup |
| 3B | Start preparing for a memory test in protected mode |
| 40 | Preparing GDT and IDT descriptor tables |
| 42 | Switching to protected mode |
| 43 | The processor is in protected mode. Interrupts enabled |
| 44 | Preparing to test the A20 line |
| 45 | A20 line test |
| 46 | RAM size determination completed |
| 47 | Test data recorded in Conventional Memory |
| 48 | Rechecking Conventional Memory |
| 49 | Extended Memory Test |
| 4B | Memory reset |
| 4C | Indication of the zeroing process |
| 4D | Recording in CMOS the resulting sizes Conventional and Extended memory 4E Indication of the actual amount of system memory |
| 4F | Extended Conventional Memory test running |
| 50 | Conventional Memory size correction |
| 51 | Extended Memory test |
| 52 | Conventional Memory and Extended Memory volumes saved |
| 53 | Delayed parity error handling |
| 54 | Disable parity and non-maskable interrupt processing |
| 57 | Initializing the memory region for POST Memory Manager |
| 58 | You are prompted to enter CMOS Setup |
| 59 | Returning the processor to real mode |
| 60 | Checking page DMA registers |
| 62 | Test of address registers and forwarding length of DMA#1 controller |
| 63 | Test of address registers and forwarding length of DMA#2 controller |
| 65 | Programming DMA controllers |
| 66 | Clearing the Write Request and Mask Set POST registers |
| 67 | Programming Interrupt Controllers |
| 7F | Resolving NMI request from additional sources |
| 80 | Sets the interrupt servicing mode from the PS/2 port |
| 81 | Keyboard interface test for reset errors |
| 82 | Setting the keyboard controller operating mode |
| 83 | Checking Keylock Status |
| 84 | Memory capacity verification |
| 85 | Displaying Error Messages |
| 86 | Configuring the system for Setup operation |
| 87 | Unpacking the CMOS Setup program into Conventional Memory. |
| 88 | Setup program completed by user |
| 89 | Completed state recovery after Setup operation |
| 8B | Reserving memory for an additional BIOS variable block |
| 8C | Programming Configuration Registers |
| 8D | Primary initialization of HDD and FDD controllers |
| 8F | Reinitializing the FDD Controller |
| 91 | Configuring the HDD Controller |
| 95 | Performing a ROM Scan to look for additional BIOSes |
| 96 | Additional configuration of system resources |
| 97 | Verifying the signature and checksum of the optional BIOS |
| 98 | Setting up System Management RAM |
| 99 | Setting the timer counter and parallel port variables 9A Generating a list of serial ports |
| 9B | Preparing an area in memory for a coprocessor test |
| 9C | Initializing the coprocessor |
| 9D | Coprocessor information is stored in CMOS RAM |
| 9E | Keyboard Type Identification |
| 9F | Search for additional input devices |
| A0 | Formation of MTRR registers (Memory Type Range Registers) |
| A2 | Error messages from previous initialization steps |
| A3 | Setting the keyboard auto-repeat timing |
| A4 | Defragmenting unused RAM regions |
| A5 | Setting the video mode |
| A6 | Cleaning the screen |
| A7 | Transferring BIOS executable code to Shadow RAM area |
| A8 | Initializing additional BIOS in segment E000h |
| A9 | Returning control to the system BIOS AA Initializing the USB bus |
| AB | Preparing the INT13 module to serve disk services |
| A.C. | Building AIOPIC tables to support multiprocessor AD systems Preparing the INT10 module to serve video services |
| A.E. | DMI initialization |
| B0 | System Configuration Table Output B1 ACPI BIOS Initialization |
| 00 | Software interrupt INT19h – Boot Sector loading |
Features of the Device Initialization Manager
In addition to the above POST codes, messages about events during the execution of Device Initialization Manager (DIM) are output to the diagnostic port. There are several control points that indicate the initialization status of system or local buses.
Setting the boot order. It happens that the devices are not in the correct order, but the solution is simple and is here in this guide. To avoid headaches and mistakes, it is recommended to keep the readings in the following order. So every time you turn on your computer, it will search installation disks, and then go straight to booting the default operating system.
Now that you know how to configure your download, go to the "Configure your download options" section. It enables or disables features such as the image that is displayed when you turn on the computer, mouse support, and keyboard reading error warnings. We recommend keeping the default settings so you know when any errors occur.
The information is displayed in word format, the low byte of which coincides with the system POST code, and the high byte indicates the type of initialization procedure being performed. The most significant tetrad in the high byte indicates the type of procedure being performed, and the low tetrad determines the bus topology for its application.
Senior tetrad:
Junior tetrad:
If a system memory configuration error is detected, port 80h is output sequentially in endless loop DE code, DF code, configuration error code, which can take the following values:
Through it, the user can assign a password to access the computer, regardless of the operating system, which means that the machine can only be started from it. Please pay close attention: there is no way to recover it if lost. The best solution is to remove the battery in a few seconds, but we do not recommend it because all settings will be lost together.
Completing and saving changes. The remaining options on this screen are for discarding and exiting the screen, discarding changes only, or loading factory settings. Look at what you are doing and get to work. Diagnosis of memory problems.
AwardBIOS V4.51PG Elite
The dynamically developing company Award Software in 1995 proposed a new solution in the field of low-level software- AwardBIOS "Elite", better known as V4.50PG. The control point maintenance mode has not changed either in the widespread version V4.51 or in the rare version V4.60. The suffixes P and G denote support for the PnP mechanism and support for energy saving functions (Green Function), respectively.
The feature can be used by entering Administrative Tools in Control Panel. Shows in detail how to use it. If the tool finds errors, you will have to either replace the memory or contact the computer manufacturer for a fix. This is because errors of this order are usually caused by problems in the memory chips or other part hardware and cannot be resolved by configuration.
Some indicators low level Memory in memory is slowness, failures and errors when displaying menus. Clicking on a specific command in a program and having a blank area appear instead of the requested content is another manifestation of the problem.
Performing a POST in Shadow RAM
| Error code | Description of the error |
|---|---|
| 03 | Disable NMI, PIE (Periodic Interrupt Enable), AIE (Alarm Interrupt Enable), UIE (Update Interrupt Enable). Prohibition of generation of programmable frequency SQWV |
| 04 | Checking the generation of requests for DRAM regeneration |
| 05 | |
| 06 | Test the memory area starting at address F000h, where BIOS 07 is located Checking the functioning of CMOS and battery power |
| BE | Programming the configuration registers of the South and North Bridges |
| 09 | Initializing the L2 Cache and Advanced Cache Control Registers on the Cyrix Processor |
| 0A | Generating a table of interrupt vectors. Configuring Power Management Resources and Setting the SMI Vector |
| 0B | Checking the CMOS checksum. Scanning PCI bus devices. Processor microcode update |
| 0C | Initializing the Keyboard Controller |
| 0D | Finding and initializing the video adapter. Setting up IOAPIC. Measurements clock frequency, FSB installation |
| 0E | MPC initialization. Video memory test. Displaying the Award Logo |
| 0F | Checking the first DMA 8237 controller. Keyboard detection and internal test. BIOS checksum verification |
| 10 | Checking the second DMA 8237 controller |
| 11 | Checking DMA controller page registers |
| 14 | Test of system timer channel 2 15 Test of the request masking register of the 1st interrupt controller |
| 16 | Test of the request masking register of the 2nd interrupt controller 19 Checking the passivity of the NMI non-maskable interrupt request |
| 30 | Determination of the volume of Base Memory and Extended Memory. APIC setup. Software control Write Allocation mode |
| Error code | Description of the error |
|---|---|
| 31 | The main on-screen RAM test. USB initialization |
| 32 | The Plug and Play BIOS Extension splash screen appears. Setting up Super I/O resources. Programmable Onboard Audio Device |
| 39 | Programming the clock generator via the I2C bus |
| 3C | Setting the software flag to allow entry into Setup |
| 3D | Initializing PS/2 mouse |
| 3E | Initializing the External Cache controller and enabling Cache BF Setting up the chipset configuration registers |
| 41 | Initializing the floppy disk subsystem |
| 42 | Disable IRQ12 if PS/2 mouse is missing. The hard drive controller is being soft reset. Scanning other IDE devices |
| 43 | |
| 45 | Initializing the FPU coprocessor |
| 4E | Display of error messages |
| 4F | Password Request |
| 50 | Restoring a previously stored CMOS state in RAM |
| 51 | Resolution of 32 bit access to HDD. Configuring ISA/PnP Resources |
| 52 | Initializing additional BIOS. Setting the values of PIIX configuration registers. Formation of NMI and SMI |
| 53 | |
| 60 | Installing BOOT Sector antivirus protection |
| 61 | Final steps to initialize the chip set |
| 62 | Reading the keyboard ID. Setting its parameters |
| 63 | Correction of ESCD, DMI blocks. Clearing RAM |
| FF | Transferring control to the bootloader. BIOS executes INT 19h command |
AwardBIOS V6.0 Medallion
The first mention of Award Medallion BIOS, Version 6.0 dates back to May 12, 1999. The structure of the new product remains unchanged, retaining the early (Early), late (Late) and final (System) phases of hardware initialization. Significant changes affected the POST execution algorithms, which was reflected in the new encoding of checkpoints, significantly expanding their scope of application. However, in the new BIOS there was no place for outdated technologies such as EISA, and for this reason a number of POST codes were abolished.
Executing startup POST procedures from ROM
Exist various ways bypass the defect. Listed below are some ways to improve the performance of volatile memory, according to the source of the deficiency. To do this, open the tool, go to the Processes tab and check which applications are consuming more memory. If the slowdown ends, it is a sign that the software in question is using too much memory. Reinstall the program or contact the developer to find alternatives.
But this figure can be increased by the user. To do this, go to the Start menu, right-click Computer and select Properties. Then go to "Advanced System Settings" and click on the "Advanced" tab. In the area corresponding to virtual memory, click the "Edit" button as shown in the first screen of the image below.
Executing startup POST procedures from ROM
At the early initialization stage, the BIOS program code is executed from the Boot Block in the Flash ROM, and is accompanied by the output of checkpoints 91h...FFh to the diagnostic port
| Error code | Description of the error |
|---|---|
| 91 | Selecting a startup script for the CF platform Determining the processor type |
| C0 | External Cache prohibition. Internal Cache prohibition. Ban Shadow RAM. Programming the DMA controller, interrupt controller, timer, RTC C1 block Determining the memory type, total volume and placement on 0C lines Checking checksums |
| C3 | Checking the first 256K DRAM for the Temporary Area organization. Unpacking BIOS in Temporary Area |
| C5 | If the checksums match, the POST code being executed is transferred to Shadow. Otherwise, control is transferred to the BIOS recovery procedure |
| B0 | Initializing North Bridge |
| A0-AF | Hardware-dependent system logic initialization procedure E0-EF Error during system logic initialization process |
BIOS recovery
Performing a POST in Shadow RAM
Late initialization is performed in RAM and continues until the user menu is called - CMOS Setup. This POST phase is characterized by the use of memory segment E000h, in which the passage of checkpoints from 01h to 7Fh is processed.
Sometimes this amount of memory is not usually met, which often happens when the user has just updated the machine. Reinstalling memory: If for any reason the module is disconnected from the socket, it will not be recognized by the motherboard. Simply open your computer and firmly insert the comb. Repeat the procedure with all modules to ensure that all modules are installed correctly.
Changing the position of the ridges: Changing the position of the memory ridges will tell you whether the problem is a module or a slot. Use a clean cloth on the module to disinfect the contacts - the cloth may contain cleaners suitable for electronics, such as isopropyl alcohol. Into the slot, use a small vacuum cleaner to remove dust.
| Error code | Description of the error |
|---|---|
| 01 | Unpacking XGROUP at physical address 1000:0000h |
| 03 | Early |
| 05 | Setting the initial values of variables that specify image attributes. Checking the CMOS Status Flag |
| 07 | Checking and initializing the keyboard controller |
| 08 | Determining the interface type of the connected keyboard |
| 0A | Procedure for autodetection of keyboard and mouse. Final settings of the keyboard controller using PCI space registers |
| 0E | Testing memory segment F000h |
| 10 | Determining the type of FlashROM installed |
| 12 | CMOS test |
| 14 | Chipset register initialization procedure |
| 16 | Primary initialization of the on-board frequency synthesizer |
| 18 | Definitions installed processor and the volume of its Cache L1 and L2 1B Generation of the interrupt vector table |
| 1C | |
| 1D | Initial setup of the Power Management system |
| 1F | Loading the keyboard matrix from the XGROUP external module |
| 21 | Initializing the Hardware Power Management subsystem |
| 23 | Coprocessor testing. Determining the FDD drive type. Preparatory stage for creating a resource map of PnP devices |
| 24 | Processor microcode update procedure. Resource distribution map update |
| 25 | Initialization and scanning of the PCI bus |
| 26 | Configuring the logic that serves the VID (Voltage Identification Device) lines. Initialization of the on-board voltage and temperature monitoring system |
| 27 | Reinitializing the Keyboard Controller |
| 29 | Initialization of the APIC included in the central processor. Measuring the frequency at which the processor operates. Setting up system logic registers. Initializing the IDE Controller |
| 2A | |
| 2B | Search VGA BIOS |
| 2D | Displaying processor information |
| 33 | Performing a Reset on a connected keyboard |
| 35 | Checking the first channel of the 8237 DMA controller |
| 37 | Checking the second channel of the DMA 8237 controller |
| 39 | Testing DMA page registers |
| 3C | Setting up the Programmable Interval Timer (8254) controller |
| 3E | Initializing the 8259 Master Controller |
| 40 | Initialization of Slave controller 8259 |
| 43 | Preparing the interrupt controller for operation. Interrupts are disabled, they are enabled later, after a memory test |
| 45 | Checking the Passivity of a Non-Maskable Interrupt (NMI) Request |
| 47 | Performing ISA/EISA tests |
| 49 | Determining the amount of basic and extended memory. Software control of Writes Allocation mode by adjusting AMD K5 registers |
| 4E | Testing memory within the first megabyte and visualizing the results on the display screen. Initializing caching schemes for single and multiprocessor systems, setting up registers on the Cyrix M1 processor |
| 50 | USB initialization |
| 52 | Testing of all available system memory, including the region for the built-in video controller (Shared Memory). Visualization of results on the display screen |
| 53 | Resetting your login password |
| 55 | Visualization of the number of detected processors |
| 57 | Initial initialization of ISA PnP devices, each of which is assigned a CSN (Card Select Number). Rendering of the EPA logo |
| 59 | Initializing the anti-virus support system |
| 5B | Start of the procedure BIOS updates from a 5D floppy drive Initializing on-board SIO and Audio controllers |
| 60 | Access to CMOS Setup is open |
| 63 | Initializing PS/2 Mouse |
| 65 | Initializing USB Mouse |
| 67 | Use of IRQ12 by PCI devices if there is no PS/2 Mouse in the system 69 Full initialization of the L2 cache controller |
| 6B | Chipset initialization according to CMOS Setup |
| 6D | Configuring Resources for ISA PnP Devices in SIO 6F Configuration Mode Initializing the Floppy Disk Subsystem |
| 73 | Preliminary steps to initialize the hard drive subsystem. On some platforms - poll ALT+F2 to launch AwardFlash |
| 75 | Finding and initializing IDE devices |
| 77 | Initializing serial and parallel ports |
| 7A | Software reset of the coprocessor, writing the control word to the FPU register CW 7C Installing protection against unauthorized writing to hard drives |
| 7F | Display error messages. Maintaining the DEL and F1 keys |
Preparing tables, arrays and structures for starting the operating system
Starting with code 82h, POST configures the system according to the CMOS settings. Its final phase is executed from the Shadow RAM area (segment E800h) and ends with the transfer of control to the operating system - code FFh.
| Error code | Description of the error |
|---|---|
| 82 | Allocates an area in system memory for power management |
| 83 | Recovering data from a temporary storage stack in CMOS |
| 84 | Displaying the message “Initializing Plug and Play Cards...” |
| 85 | USB initialization complete |
| 86 | Reserved, Carry Flag clearing |
| 87 | Building SYSID tables in the DMI area |
| 88 | Reserved, Carry Flag clearing |
| 89 | Generating ACPI Service Tables |
| 8A | Reserved, Carry Flag clearing |
| 8B | Searching and initializing BIOS for additional devices |
| 8C | Reserved, Carry Flag clearing |
| 8D | Initializing parity bit maintenance routines |
| 8E | Reserved, Carry Flag clearing |
| 8F | IRQ12 resolution for mouse hot plugging 90 Reserved, clear Carry Flag |
| 91 | Initializing Legacy platform resources |
| 92 | Reserved, Carry Flag clearing |
| 93 | Presumably not used |
| 94 | Final steps to initialize the main set of logic before loading the operating system. The power management system completes initialization. The starting line is removed BIOS splash screen, the resource distribution table is displayed. AMD K6® family processors have specific settings. Microcode update for family processors Intel Pentium® II and higher |
| 95 | Setting the automatic transition to winter/summer time. Programming the keyboard controller for the auto-repeat frequency |
| 96 | In multiprocessor systems, final system settings are performed and service tables and fields are created. For processors of the Cyrix family it is carried out additional customization registers Building the ESCD "Extended System Configuration Data" table. Setting the DOS Time counter in accordance with Real Time Clock. Boot device partitions are saved for further use by built-in antivirus tools: Trend AntiVirus or Paragon Anti-Virus Protection. The system speaker emits a POST completion signal. The MSIRQ table is built and saved |
A number of processes occurring in the Award Medallion BIOS are designated by special groups of control points. These include:
The presence of a beep or flashing light usually indicates that the main function cannot be started. Basic functions include memory reading, video display, or the ability to transfer information to HDD. The most common problems with beep codes or flashing LEDs are memory or heat related, caused by dust accumulation in large cooling zones.
Use the following steps when your computer displays a flashing or beeping signal. Step 2: Dust in your computer's cooling zones. If your computer is new and has never been used before, you can skip this step. Over time, dust can accumulate in your computer's cooling ducts. Excessive dust can block airflow and cause sensitive components to overheat and fail. Before troubleshooting flashing or beeping problems at startup, it is important to remove any dust buildup.
System Event codes - control points of system events.
Power Management Debug codes are checkpoints that occur during the execution of APM or ACPI services.
System Error codes - messages about fatal errors.
Debug codes for MP system - initialization points for multiprocessor platforms.
Features of accelerated POST passage
To reduce system boot time, the user can select the "Quick Power On Self Test" option in CMOS Setup. In this case, the completion of POST will be accelerated by refusing to perform some procedures (Quick Boot).
Executing Procedures from Boot Block
Wear safety glasses and use compressed air or the end of a vacuum cleaner to remove dust from the vents, preferably from the outside. Drawing: aspiration dust in the aeration holes. Memorize flashing or beeping signals for troubleshooting purposes. Follow these steps to mark the error conditions on a piece of paper.
If the light is blinking, count how many times it blinks before pausing, and check for strong beeps on your computer. If your computer beeps, pay attention to the type and number of beeps between pauses, for example: 2 long beeps followed by 1 short beep. Pay attention to the details on the piece of paper to remind you of the error in the next steps. See the "Beep Descriptions" section of this support document to try to find the component that is causing the problem. You can use this information in the next step when troubleshooting, and if your computer needs repair, you can use this code and this information during service with a service technician. Press the power button to turn on the computer. . Sound signals launches have changed.
The Quick Boot operating pattern replaces the late and final POST phases and does not affect the operation of the boot block. Award Software offers a codification of the executable procedures for expedited POST that differs from the standard one. Quick Boot begins with the output of checkpoint 65h to the diagnostic port and ends with POST code 80h. Control is then transferred to the operating system, displaying the usual Award BIOS code FFh.
Older computers use a number of beeps. These codes are not valid for older models. We will see this in this article. The startup sequence is all the steps that will occur immediately after your computer starts up. There are several elements in this sequence, what is the purpose of knowing this sequence? problem, identify it better and solve it better, and of course know your computer better.
This is the sequence in which all components will be tested, as well as their compatibility. The system bus check will begin, and then check all expansion slots. It will go on, testing your memory graphics card and signals that control the display. This is when the first displays arrive on the screen. It checks to see if the keyboard and mouse are well connected, and then sends signals to all storage devices to determine which drives are different.
| Error code | Description of the error |
|---|---|
| 65 | Early initialization of the SIO controller, software reset of the video controller. Setting up the keyboard controller, testing the keyboard and mouse. Initializing the sound controller. Checking the integrity of BIOS structures. Unpacking Flash ROM maintenance procedures. Initializing the onboard frequency synthesizer |
| 66 | Initializes the L1/L2 cache according to the results obtained from the CPUID command. Generation of a vector table consisting of pointers to interrupt handling routines. Initializing Power Management Hardware |
| 67 | Checking CMOS and battery power plausibility. Configuring chipset registers according to CMOS settings. Initializing the keyboard controller as part of the chipset. Generating BIOS Data Area Variables |
| 68 | Initializing the video system |
| 69 | Configuring i8259 interrupt controller |
| 6A | An accelerated single-pass RAM test is performed using a special algorithm |
| 6B | Visualization of the number of detected processors, the EPA logo and a prompt to launch the AwardFlash utility. Configuring embedded I/O controller resources in configuration mode |
| 70 | Invitations to enter Setup. Initializing PS/2 and USB Mouse |
| 71 | Initializing the cache controller |
| 72 | Setting up system logic configuration registers. Generating a list of Plug and Play devices. Initializing the FDD controller |
| 73 | Initializing the HDD controller |
| 74 | Initializing the coprocessor |
| 75 | If specified by the user in CMOS Setup, the IDE HDD is write protected. |
| 77 | Request for a password and display the message: “Press F1 to continue, DEL to enter Setup” |
| 78 | Initializing BIOS for additional devices on ISA and PCI buses |
| 79 | Initializing Legacy platform resources |
| 7A | Generating the root table RSDT and device tables DSDT, FADT, etc. |
| 7D | Finding information about boot device partitions |
| 7E | Configuring BIOS services before booting the operating system |
| 7F | Setting the NumLock flag according to CMOS SetUp |
| 80 | Transferring control to the operating system |
Performing a POST in Power Saving Mode
One of the platform states, when the contents of RAM are stored on the hard disk, is called Hibernate. In the ACPI specification ("Advanced Configuration and Power Interface Specification", Revision 2.0a dated 03/31/2002) it is defined as the S4 (Non-Volatile Sleep) power saving mode. Returning to full functioning requires a special way of completing POST.
These errors are independent of the operating system. Errors that can occur at this stage of the boot process are often storage order, meaning there may be multiple active partitions or no valid media or the partition table is changing.
Errors that can occur at this level are again related to hardware problems. That is, for example, one of the loaded sectors is missing. It loads most of the registry. The problems that can arise here are mainly problems related to the files that need to be run, such as a missing file or a problem accessing one of the files.
The ACPI S4 operating scheme, as with the accelerated start, replaces the late and final phases of POST. An essential point is checking the startup script in the boot block. Depending on what ACPI state the system is in after the hardware Reset signal, a decision is made to exit state S4, which begins with the output of test point 90h to the diagnostic port and ends with POST code 9Fh.
| Error code | Description of the error |
|---|---|
| 90 | Early initialization of the SIO controller, software reset of the video controller. Setting up the keyboard controller, testing the keyboard and mouse |
| 91 | CMOS and Battery Validation Check |
| 92 | Initialization of system logic registers and on-board frequency synthesizer |
| 93 | Initializing the cache using CPUID information |
| 94 | Generation of a vector table consisting of pointers to interrupt handling routines. Initializing Power Management Hardware |
| 95 | PCI bus scanning |
| 96 | Initializing the embedded keyboard controller |
| 97 | Initializing the video system |
| 98 | VGA adapter message output |
| 99 | Checking the first channel of the DMA8237 controller by writing and test reading the base address and forwarding block length registers 9A Configuring the i8259 interrupt controller |
| 9B | Initializing PS/2 and USB Mouse. Unpacking ACPI code. Initializing the cache controller |
| 9C | Setting up system logic configuration registers. Generating a list of Plug and Play devices. Initialization of FDD and HDD controllers |
| 9D | The PM region is not reserved in system memory if it is created in Shadow RAM or SMRAM. In some cases, a repeated, final initialization of the USB bus is required, performed with the L1 cache disabled |
| 9E | Setting up Power Management, which is part of the system logic. Initialization of SMI generation circuits and installation of the SMI vector. Programming resources responsible for monitoring PM system events |
| 9F | The disable and enable operation clears the L1/L2 cache and restores its current size. The power saving mode control settings specified in CMOS Setup are saved in PM RAM. For mobile platforms, a check is made to return to full operation after turning off all supply voltages (Zero Volt Suspend mode) |
Phoenix Technologies, Ltd.
One of the leaders in the development of low-level software, Phoenix Technologies, timed the release of Windows95 new version PhoenixBIOS 4.0. Family support Intel processors Pentium is reflected in the name of the intermediate revisions. One of the latest - Release 6.0 - formed the basis for all released BIOS. With the advent of Release 6.1, there were no significant changes in the execution of POST procedures, and, therefore, this did not affect the indication of checkpoints.
A distinctive feature of PhoenixBIOS is that if testing errors occur during POST of 512 KB of main memory (codes 2Ch, 2Eh, 30h), port 80h is output Additional Information in word format, the bits of which identify the faulty address line or data cell. For example, the code "2C 0002" means that a memory fault has been detected on address line 1. The code "2E 1020" in this case will mean that a fault has been detected on data lines 12 and 5 in the low byte of the memory data bus. On 386SX systems that use a sixteen-bit data bus, it is not possible for an error to occur during code execution step 30h
The POST code output to the diagnostic port is accompanied by an audio signal output to the system speaker. The sound signal generation scheme is as follows:
- The eight-bit code is converted into four two-bit groups
- The value of each group increases by one
- Based on the received value, a short sound signal is generated (for example: code 16h = 00 01 01 10 = 1-2-2-3)
Executing startup POST procedures from ROM
| Error code | Description of the error |
|---|---|
| 01 | Initializing the Baseboard Management Controller (BMC) |
| 02 | Checking the current processor operating mode |
| 03 | Disabling non-maskable interrupts |
| 04 | The type of installed processor is determined |
| 06 | Initial settings of the PIC and DMA registers |
| 07 | The memory area designated for the BIOS copy is reset to zero |
| 08 | Early initialization of system logic registers |
| 09 | Setting the POST software flag |
| 0A | Initializing processor software resources |
| 0B | Internal Cache permission |
| 0E | Initializing Super I/O Resources |
| 0C | Initialize L1/L2 cache according to CMOS values |
| 0F | Initializing the IDE |
| 10 | Initializing the Power Management subsystem |
| 11 | Setting Alternate Register Values |
| 12 | The value of the MSW (Machine Status Word) register is being set. |
| 13 | Early provisioning of PCI devices |
| 14 | Initializing the Keyboard Controller |
| 16 | Checking the ROM BIOS checksum |
| 17 | Determining L1/L2 cache size |
| 18 | Initializing the 8254 system timer |
| 1A | Initializing the DMA Controller |
| 1C | Resetting programmable interrupt controller values |
| 20 | Checking the generation of DRAM regeneration requests |
| 22 | Checking the operation of the keyboard controller |
| 24 | Installing a selector for servicing a flat 4Gb memory model |
| 26 | A20 line resolution |
| 28 | Determining the total amount of installed memory |
| 29 | Initializing POST Memory Manager (PMM) |
| 2A | Resetting 640Kb of main memory |
| 2C | Testing address lines |
| 2E | Failure on one of the data lines in the low byte of the memory data bus |
| 2F | Selecting a cache memory protocol |
| 30 | Available system memory test |
| 32 | Determining CPU clock parameters and bus frequency |
| Error code | Description of the error |
|---|---|
| 33 | Initializing Phoenix Dispatch Manager |
| 34 | Prohibiting Power Off Using ATX Power Button |
| 35 | Settings of system logic registers that control the formation of timing characteristics of access to memory, input/output ports, system and local buses |
| 36 | A restart is performed if the transition to the next POST procedure fails. The sequence of procedures is managed by Watch Dog Service |
| 37 | The process of setting up system logic registers is completed. |
| 38 | The contents of the BIOS Runtime module are unpacked and rewritten into the area intended for Shadow RAM |
| 39 | Reinitializing the Cache Controller |
| 3A | L2 cache resize |
| 3B | Initializing BIOS Execution Trace |
| 3C | Additional configuration of logic registers to configure PCI-PCI bridges and support for distributed PCI buses |
| 3D | The system logic registers are configured in accordance with the CMOS Setup settings |
| 3E | Read Hardware Configuration |
| 3E | Checking the ROM Pilot system connection |
| 40 | Determining CPU clock parameters |
| 41 | Initializing ROM Pilot - remote boot control |
| 42 | |
| 44 | Set BIOS Interrupt |
| 45 | Initializing devices before enabling the PnP mechanism |
| 46 | The BIOS checksum is calculated using a special algorithm |
| 47 | Initializing I2O I/O controllers |
| 48 | Search for video adapter |
| 49 | PCI Initialization |
| 4A | Initializing system video adapters |
| 4B | Quiet Boot is running - a shortened system startup sequence used to speed up POST. |
| 4C | VGA BIOS contents are rewritten to the transit area |
| 4E | Visualization of BIOS text string Copyright |
| 4F | Reserving memory for the boot device selection menu |
| 50 | The processor type and its clock frequency are visualized |
| 51 | Initializing the EISA controller and devices |
| 52 | Keyboard Controller Programming |
| 54 | Keyboard sound mode activated |
| 55 | Initializing the USB controller |
| 58 | Finding unserviced interrupt requests |
| 59 | Initializing the POST Display Service (PDS) procedure 5A Displaying the message “Press F2 to enter SETUP” |
| 5B | Disable CPU Internal Cache |
| 5C | Conventional Memory Check |
| 5E | Detect Base Address |
| 60 | Extended Memory Check |
| 62 | Checking Extended Memory Address Lines |
| 64 | Transferring control to an executable block generated by the motherboard manufacturer (Patch1) |
| 66 | Configuring cache control registers |
| 67 | Minimal initialization of APIC controllers |
| 68 | L1/L2 cache resolution |
| 69 | Preparing System Management Mode RAM |
| 6A | External Cache volume is visualized |
| 6B | Setting CMOS Setup Defaults |
| 6C | Visualization of Shadow RAM usage information |
| 6E | Visualization of information about Upper Memory Blocks (UMB) |
| 70 | Displaying Error Messages |
| 72 | Checking the current system configuration and CMOS information |
| 76 | Checking Keyboard Error Information |
| 7A | Checking the status of software (System Password) or hardware (Key Lock Switch) keyboard locking tools |
| 7C | Setting hardware interrupt vectors |
| 7D | Initializing the power tracking system |
| 7E | Initializing the coprocessor |
| 80 | On-board SIO I/O controller is prohibited |
| 81 | Preparing to boot the operating system |
| 82 | Finding and identifying RS232 ports |
| 83 | Configuring external IDE controllers |
| 84 | Finding and identifying parallel ports |
| 85 | Initializing ISA PnP Devices |
| 86 | On-board resources of the SIO controller are configured in accordance with the CMOS Setup settings |
| 87 | Configuring MCD (Motherboard Configurable Devices) |
| 88 | The values of the variable block in the BIOS Data Area are set |
| 89 | Allows generation of a non-maskable interrupt |
| 8A | Setting the values of variables located in the Extended BIOS Data Area |
| 8B | Checking PS/2 Mouse connection diagrams |
| 8C | Initializing the drive controller |
| 8F | Determining the number of connected ATA devices |
| 90 | Initializing and configuring hard drive controllers |
| 91 | Setting temporary parameters for hard drive operation in PIO mode |
| 92 | Transferring control to an executable block generated by the motherboard manufacturer (Patch2) |
| 93 | Building a multiprocessor system configuration table |
| 95 | Selecting CD-ROM Maintenance Procedure |
| 96 | Return to Real Mode |
| 97 | Building MP Configuration Table |
| 98 | ROM Scan in progress |
| 99 | Checking the status of the SMART parameter 9A The contents of the ROM are written to RAM |
| 9C | Setting up the Power Management subsystem |
| 9D | Initializing resources to protect against unauthorized access |
| 9E | Hardware interrupts are enabled |
| 9F | The number of IDE and SCSI drives is determined |
| A0 | Setting DOS Time based on RTC state A1 The purpose of this code is unknown A2 Checking the Key Lock state |
| A4 | Keyboard Auto-Repeat Characteristics Settings |
| A8 | The "Press F2 to enter Setup" message is removed from the screen |
| A.A. | The presence of the SCAN code of the F2 key in the input buffer AC is checked. The Setup program is launched. |
| A.E. | The restart flag executed by CTRL+ALT+DEL B0 is cleared. The message "Press F1 to resume, F2 to Setup" is generated. |
| B1 | POST progress flag is cleared B2 POST completed |
| B4 | Sound signal before booting |
| B5 | Quiet Boot phase completed |
| B6 | Password check if this mode is enabled in Setup B7 Initializing ACPI BIOS |
| B9 | Searching for boot devices on the USB bus BA Initializing DMI parameters |
| BB | Repeating the ROM Scan procedure |
| B.C. | The RAM parity error latching trigger is reset. |
| BD | A menu is displayed for selecting a boot device BE Clearing the screen before loading the operating system BF Activating anti-virus support |
| C0 | The software interrupt processing procedure INT 19h is launched - the Boot Sector loader. The interrupt service routine sequentially attempts to load the Boot Sector by polling disk devices in the order prescribed by Setup |
| C1 | Initialization of fault maintenance routine (PEM) C2 Calling service routines for error logging |
| C3 | Visualization of error messages in the order they were received C4 Setting initial state flags |
| C5 | Initializing an extended block of CMOS RAM cells |
| C6 | Initial initialization of the docking station |
| C7 | Lazy dock initialization |
| C8 | Execution of test procedures included in the Boot Block to determine the integrity of BIOS structures |
| C9 | Checking the integrity of structures and/or modules external to the system BIOS |
| C.A. | Running Console Redirect to serve remote keyboard CB Emulation disk devices in RAM/ROM |
| CC | Run Console Redirect to serve video CDs Support PCMCIA communications |
| C.E. | Setting up the Light Pen Controller |
Fatal Error Messages
D0 Error caused by an exceptional situation (Exception error) D2 Calling an interrupt handling procedure from an unidentified source D4 Error associated with a violation of the protocol for issuing and clearing interrupt requests D6 Exiting protected mode with software reset generation D7 To save the state of the video adapter, more is required amount of memory than is available in SMRAM D8 Error during software generation of the processor reset pulse DA Loss of control when returning to Real Mode DC Exit from protected mode with software reset generation without re-initializing the interrupt controller DD Error when testing extended memory DE Keyboard controller error DF Line control error A20 19Executing Procedures from Boot Block
| Error code | Description of the error |
|---|---|
| E0 | Setting up E1 chipset configuration registers Initializing the North and South bridges |
| E2 | Initializing the CPU |
| E3 | Initializing the system timer |
| E4 | Initializing Super I/O Resources |
| E5 | Checking the status of Recovery Jumper, the installation of which forces the BIOS Recovery mode to start |
| E6 | BIOS checksum verification |
| E7 | Control is transferred to the BIOS if its checksum is calculated correctly E8 Initialize MPS support |
| E9 | Transition to a flat 4Gb memory model |
| E.A. | Initialization of non-standard equipment |
| E.B. | Configuring the interrupt controller and direct memory access |
| E.C. | By writing and control readings using a special algorithm, the memory type is determined: FPM, EDO, SDRAM, and the Host Bridge configuration registers are configured in accordance with the result |
| ED | By means of records and control readings using a special algorithm, the volume of memory banks and placement in rows are determined. In accordance with the result, the Host Bridge configuration registers (DRAM Row Boundary) are configured |
| E.E. | The contents of the Boot Block are copied to Shadow RAM EF Preparing SMM RAM for the SMI handler |
| F0 | Memory test |
| F1 | Initializing interrupt vectors |
| F2 | Initializing Real Time Clock |
| F3 | Initializing the video subsystem |
| F4 | Generating a beep before booting |
| F5 | Loading the operating system stored in Flash ROM |
| F6 | Return to Real Mode |
| F7 | Boot to Full DOS |
| F8 | Initializing the USB controller |
| FA...FF | Codes for interaction with the PhDebug procedure |
Insyde Software Corp.
Market Insider mobile systems has firmly established itself where loyalty to tradition and a conservative approach to building a BIOS are required. Having inherited source from SystemSoft, the company is constantly working to improve it. The latest revision of MobilePRO is actively used in Mitac and Clevo laptops, the documentation for which formed the basis of the Error Codes table - this is what Insyde Software calls POST checkpoints.
Boot block checkpoints
Despite the fact that your first BIOS company Created by Insyde Software in 1992, the established model of the boot block - or Boot Loader, as the creators themselves called it - was finally formed only towards the end of 1995. From this moment on, the starting procedure was numbered by version and creation date.
The most significant point from the point of view of a service engineer examining the loading process computer system with InsydeBIOS, the device becomes a diagnostic code display device. Although, as a rule, Boot Loader uses Manufacture's Diagnostic Port 80h, standard in such cases, in some cases, test point output is performed only on the PIO Port (Parallel Input/Output port for diagnostic purpose), which is nothing more than a parallel port 378h There are implementations in which the diagnostic codes sent to port 80h are duplicated to the parallel port.
| Error code | Description of the error |
|---|---|
| 00 | Starting point for boot block execution 01 Inhibit line A20 (not used) |
| 02 | CPU microcode update |
| 03 | Testing RAM |
| 04 | Transferring the boot block to RAM |
| 05 | Executing a boot block from RAM |
| 06 | Forcing the Flash ROM recovery procedure |
| 07 | Transferring the system BIOS to RAM |
| 08 | System BIOS checksum verification |
| 09 | Running the POST procedure |
| 0A | Starting the Flash ROM recovery procedure from an FDD drive |
| 0B | Initializing the frequency synthesizer |
| 0C | Completing the BIOS recovery procedure |
| 0D | Alternative procedure for recovering Flash ROM from FDD |
| 0F | Stopping if a fatal error occurs |
| BB | LPC SIO early initialization |
| CC | Starting point for starting Flash ROM recovery |
| 88 | Enabling ACPI Features |
| 99 | Error when exiting STR mode |
| 60 | Switching to Big Real Mode |
| 61 | Initialization of SM Bus. SPD data is stored in CMOS A0 Read and parse SPD fields previously stored in CMOS A1 Memory controller initialization |
| A2 | Defining logical banks of a DIMM |
| A3 | Programming DRB registers (DRAM Row Boundary) |
| A4 | Programming DRA Registers (DRAM Row Attributes) |
| A.E. | DIMMs have been detected in the system that differ in their Error Correcting Codes (ECC) functions. |
| A.F. | Primary initialization of memory controller registers mapped to memory space |
| E1 | The boot procedure fails if the DIMM is not equipped with an SPD chip |
| E2 | DIMM type does not match system requirements |
| E.A. | The minimum time between activating DIMM strings and entering the regeneration state does not meet system requirements |
| E.C. | Register modules are not supported ED Checking CAS Latency modes |
| E.E. | DIMM organization not supported by motherboard |
Executing POSTs from RAM
The most modern InsydeBIOS solutions use 16-bit checkpoint mapping. This is done using ports 80h and 81h, the latter of which is intended to extend standard diagnostics.
The study of control points is made difficult by their irregular construction, when processes of different meaning are accompanied by the same codes. In dual diagnostic systems, there are differences of a different order: some POST codes are displayed only in one of the ports without the usual duplication in such cases.
| Error code | Description of the error |
|---|---|
| 10 | Cache initialization, CMOS check |
| 11 | Line A20 prohibited. Setting registers for 8259 controllers. |
| 12 | Determining the boot method |
| 13 | Initializing the Memory Controller |
| 14 | Searching for a video adapter connected to the ISA bus |
| 15 | Setting System Timer Values |
| 16 | Setting system logic registers using CMOS |
| 17 | Calculating the total amount of RAM |
| 18 | Testing the low page of Conventional Memory |
| 19 | Verifying the checksum of the Flash ROM image |
| 1A | Resetting the Interrupt Controller Registers |
| 1B | Initializing the video adapter |
| 1C | Initializing a subset of video adapter registers compatible with program model 6845 |
| 1D | Initializing the EGA adapter |
| 1E | Initializing the CGA adapter |
| 1F | DMA controller page register test |
| 20 | Checking the keyboard controller |
| 21 | Initializing the Keyboard Controller |
| 22 | Comparison of the resulting amount of RAM with the value in CMOS |
| 23 | Checking battery backup and Extended CMOS |
| 24 | Testing DMA Controller Registers |
| 25 | Setting DMA controller parameters |
| 26 | Formation of the interrupt vector table |
| 27 | Accelerated determination of the amount of installed memory |
| 28 | Protected Mode |
| 29 | System memory test completed |
| 2A | Exiting Protected Mode |
| 2B | Transferring the Setup procedure to RAM |
| 2C | Starting the video initialization procedure |
| 2D | Re-search for CGA adapter |
| 2E | Re-search for EGA/VGA adapter |
| 2F | Displaying VGA BIOS messages |
| 30 | Custom Keyboard Controller Initialization Routine |
| 31 | Checking the connected keyboard |
| 32 | Checking the passage of a request from the keyboard |
| 33 | Checking the Keyboard Status Register |
| 34 | Test and reset system memory |
| 35 | Protected Mode |
| 36 | Extended memory test completed |
| 37 | Exiting Protected Mode |
| 38 | A20 line ban |
| 39 | Initializing Cache Controller 3A Checking the System Timer |
| 3B | Setting the DOS Time counter according to Real Time Clock |
| 3C | Initializing the hardware interrupt table |
| 3D | Finding and initializing manipulators and pointers |
| 3E | Setting the status of the NumLock key |
| 3F | Initializing serial and parallel ports |
| 40 | Configuring Serial and Parallel Ports |
| 41 | Initializing the FDD controller |
| 42 | Initializing the HDD controller |
| 43 | Initializing Power Management for the USB Bus |
| 44 | Finding and initializing additional BIOS |
| 45 | Resetting the NumLock key status |
| 46 | Checking coprocessor functionality |
| 47 | Initializing PCMCIA |
| 48 | Preparing to start the operating system |
| 49 | Transferring control to executable Bootstrap code |
| 50 | ACPI initialization |
| 51 | Initializing Power Management |
| 52 | Initializing the USB Bus Controller |
Since you are here, it means you are interested in BIOS error codes or just decided to take a look and find out what it is? In general, the thing is, about two weeks ago, when I turned on the computer, the BIOS beeped “incorrectly”, I fixed my problem very quickly and slowly began to collect information about BIOSes, or rather about error codes, and today I am posting tables with the BIOS version for you , the number of sounds, what this sound or code means and in some cases also how to fix this problem.
How to find out the BIOS version?
It's simple, let's open it context menu“Run” (Win+R), type:
msinfo32
and press “OK”.
A window will open...
Now in the "System Information" tab in the right window, below there will be "BIOS Version".
Now everyone, look at the table, look for your version, find the BIOS error code and see what it means, in some cases I also posted how to get rid of the errors.
And so, here you go BIOS sounds and their designations.
Award BIOS Signals:
| Number of signals | Designation | Solution |
| 1 short | Successful POST (no errors detected) and you can continue to work quietly | - |
| 2 short | Minor errors | Check if the hard drive and motherboard cables are securely fastened |
| 3 long | Check the quality of the connection between the mouse and keyboard and the “mother” | |
| Continuous signal | The power supply is faulty | ... (I think it’s clear here) |
| No signals | The power supply is not connected to the motherboard or is faulty | |
| 1 long + 1 short | RAM errors | Remove the RAM modules, blow off/wipe off the dust and insert tightly |
| 1 long + 2 short | Problems with the video adapter | Same as with RAM |
| 1 long + 3 short | Keyboard initialization errors | Check connection reliability |
| 1 long + 9 short | Error reading data from ROM | The BIOS may not be suitable for your configuration |
| Long repeating | Incorrect installation of memory modules | Perhaps the modules are not inserted tightly, or again they do not fit your hardware |
| Short repeating | Problems with the power supply | It may need to be replaced, but first try cleaning it from dust) |
AMI BIOS signals:
| Number of signals | Designation | Solution |
| 1 short | No errors found | - |
| 2 short | Check the installation of memory modules | |
| 3 short | Error during operation of main memory (first 64 KB) | see above |
| 4 short | System timer is faulty | |
| 5 short | CPU faulty | |
| 6 short | The keyboard controller is faulty | |
| 7 short | ||
| 8 short | Problems with the video adapter | |
| 9 short | ||
| 10 short | Unable to write to CMOS memory | |
| 11 short | External cache is faulty | |
| 1 long + 2 short | Video adapter is faulty | |
| 1 long + 3 short | Video adapter is faulty | |
| 1 long + 8 short | Problems with the video adapter or the monitor is not connected |
IBM BIOS signals:
| Number of signals | Designation | Solution |
| 1 short | No errors found | |
| 1 long + 1 short | Motherboard is faulty | |
| 1 beep + blank screen | Video system is faulty | |
| 1 long + 2 short | Video system faulty (Mono/CGA) | |
| 1 long + 3 short | Video system (EGA/VGA) is faulty | |
| 2 short | The video system is faulty (monitor not connected) | |
| 3 long | Motherboard faulty (keyboard controller error) | |
| No signal | The power supply or speakers are faulty | |
| Continuous signal | The power supply is faulty | |
| Repeated short beeps | The power supply is faulty |
Compaq BIOS Signals:
| Number of signals | Designation | Solution |
| 1 short | No errors found | - |
| 1 long + 1 short | BIOS CMOS memory checksum error. The ROM battery may be dead | Reflash the BIOS or restore using the motherboard |
| 2 short | Unknown error | |
| 1 long + 2 short | Video system error | Check that the video adapter is installed correctly, you may need to replace the video card |
| 7 signals (1d-1k-1d-1k-pause-1d-1k-1k) | AGP video card is faulty | see above |
| 1 continuous signal | RAM error | Check that the memory is installed correctly. Check contacts. Replace memory modules. |
| 1 short, 2 long | RAM error | see above |
From Phoenix BIOS signals:
Here, unlike other BIOS, there are alternating signals.
| Number of signals | Designation | Solution |
| 1-1-3 | CMOS data write/read error | |
| 1-1-4 | BIOS chip contents checksum error | |
| 1-2-1 | Motherboard is faulty | |
| 1-2-2 | DMA controller initialization error | |
| 1-2-3 | Error when trying to read/write to one of the DMA channels | |
| 1-3-1 | RAM problem detected | |
| 1-3-3 | ||
| 1-3-4 | Error when testing the first 64 KB of RAM | |
| 1-4-1 | Motherboard is faulty | |
| 1-4-2 | Problems detected with RAM | |
| 1-4-3 | System timer error | |
| 1-4-4 | Error accessing I/O port. The error may be caused by a peripheral device using this port for your work | |
| 3-1-1 | Error initializing the second DMA channel | |
| 3-1-2 | Error initializing the first DMA channel | |
| 3-1-4 | Motherboard is faulty | |
| 3-2-4 | Keyboard controller error | |
| 3-3-4 | Error when testing video memory | |
| 4-2-1 | System timer error | |
| 4-2-3 | Error when operating line A20. The keyboard controller is faulty | |
| 4-2-4 | Error when working in protected mode. The CPU may be faulty | |
| 4-3-1 | Error when testing RAM | |
| 4-3-4 | Real Time Clock Error | |
| 4-4-1 | Serial port test failed. May be caused by a device using a serial port for its operation | |
| 4-4-2 | Parallel port test failed. May be caused by a device that uses a parallel port for its operation | |
| 4-4-3 | Error when testing math coprocessor |
AST BIOS signals:
| Number of signals | Designation | Solution |
| 1 short | Error when checking processor registers. Processor failure | |
| 2 short | Keyboard controller buffer error. Keyboard controller malfunction | |
| 3 short | Keyboard controller reset error. Problem with keyboard controller or system board | |
| 4 short | Keyboard communication error | |
| 5 short | Keyboard error | |
| 6 short | System board error | |
| 9 short | BIOS ROM checksum mismatch. BIOS ROM chip is faulty | |
| 10 short | System timer error. System timer chip is faulty | |
| 11 short | Chipset error | |
| 12 short | Power management register error in non-volatile memory | |
| 1 long | DMA controller error 0. The DMA controller chip on channel 0 is faulty. | |
| 1 long + 1 short | DMA controller error 1. Channel 1 DMA controller chip is faulty | |
| 1 long + 2 short | Frame retrace suppression error. The video adapter may be faulty | |
| 1 long + 3 short | Error in video memory. Video adapter memory is faulty | |
| 1 long + 4 short | Video adapter error. Video adapter is faulty | |
| 1 long + 5 short | Memory error 64K | |
| 1 long + 6 short | Failed to load interrupt vectors. BIOS was unable to load interrupt vectors into memory | |
| 1 long + 7 short | Failed to initialize video hardware | |
| 1 long + 8 short | Video memory error |
Well, that's it, I posted more or less common ones types of BIOS with error codes. If you have any questions, please contact us!
