In Fig. Figure 2.16 shows a diagram of a logic element with an induced channel of type n (the so-called n MIS technology). The main transistors VT 1 and VT 2 are connected in series, transistor VT 3 acts as a load. In the case when a high voltage U 1 is applied at both inputs of the element (x 1 = 1, x 2 = 1), both transistors VT 1 and VT 2 are open and a low voltage U 0 is set at the output. In all other cases, at least one of the transistors VT 1 or VT 2 is closed and the voltage U 1 is set at the output. Thus, the element performs the logical AND-NOT function.

In Fig. Figure 2.17 shows a diagram of the OR-NOT element. A low voltage U 0 is set at its output if at least one of the inputs has a high voltage U 1 , opening one of the main transistors VT 1 and VT 2 .

Shown in Fig. 2.18 diagram is a diagram of the NOR-NOT element of the KMDP technology. In it, transistors VT 1 and VT 2 are the main ones, transistors VT 3 and VT 4 are the load ones. Let high voltage U 1. In this case, transistor VT 2 is open, transistor VT 4 is closed and, regardless of the voltage level at the other input and the state of the remaining transistors, a low voltage U 0 is set at the output. The element implements the logical OR-NOT operation.

The CMPD circuit is characterized by very low current consumption (and therefore power) from power supplies.

Logic elements of integral injection logic

In Fig. Figure 2.19 shows the topology of the logical element of the integral injection logic (I 2 L). To create such a structure, two phases of diffusion in silicon with n-type conductivity are required: during the first phase, regions p 1 and p 2 are formed, and during the second phase, regions n 2 are formed.

The element has the structure p 1 -n 1 -p 2 -n 1 . It is convenient to consider such a four-layer structure by imagining it as a connection of two conventional three-layer transistor structures:

p 1 -n 1 -p 2 n 1 -p 2 -n 1

The diagram corresponding to this representation is shown in Fig. 2.20, a. Let's consider the operation of the element according to this scheme.

Transistor VT 2 with a structure of type n 1 -p 2 -n 1 performs the functions of an inverter with several outputs (each collector forms a separate output of an element according to an open collector circuit).

Transistor VT 2, called injector, has a structure like p 1 -n 1 -p 2 . Since the area n 1 of these transistors is common, the emitter of transistor VT 2 must be connected to the base of transistor VT 1; the presence of a common area p 2 leads to the need to connect the base of transistor VT 2 with the collector of transistor VT 1. This creates a connection between transistors VT 1 and VT 2, shown in Fig. 2.20a.

Since the emitter of transistor VT 1 has a positive potential and the base is at zero potential, the emitter junction is forward biased and the transistor is open.

The collector current of this transistor can be closed either through transistor VT 3 (inverter of the previous element) or through the emitter junction of transistor VT 2.

If the previous logical element is in the open state (transistor VT 3 is open), then at the input of this element there is a low voltage level, which, acting on the basis of VT 2, keeps this transistor in the closed state. The injector current VT 1 is closed through the transistor VT 3. When the previous logic element is closed (transistor VT 3 is closed), the collector current of the injector VT 1 flows into the base of the transistor VT 2, and this transistor is set to the open state.

Thus, when VT 3 is closed, transistor VT 2 is open and, conversely, when VT 3 is open, transistor VT 2 is closed. The open state of the element corresponds to the log.0 state, and the closed state corresponds to the log.1 state.

The injector is a source of direct current (which can be common to a group of elements). Often they use the conventional graphic designation of an element, presented in Fig. 2.21, b.

In Fig. Figure 2.21a shows a circuit that implements the OR-NOT operation. The connection of element collectors corresponds to the operation of the so-called installation I. Indeed, it is enough that at least one of the elements is in the open state (log.0 state), then the injector current of the next element will be closed through the open inverter and a low log.0 level will be established at the combined output of the elements. Consequently, at this output a value is formed corresponding to the logical expression x 1 · x 2. Applying the de Morgan transformation to it leads to the expression x 1 · x 2 = . Therefore, this connection of elements really implements the OR-NOT operation.

Logic elements AND 2 L have the following advantages:

provide a high degree of integration; in the manufacture of I 2 L circuits, the same technological processes are used as in the production of integrated circuits on bipolar transistors, but the number of technological operations and the necessary photomasks is smaller;

a reduced voltage is used (about 1V);

provide the ability to exchange power over a wide range of performance (power consumption can be changed by several orders of magnitude, which will correspondingly lead to a change in performance);

are in good agreement with TTL elements.

In Fig. Figure 2.21b shows a diagram of the transition from the I 2 L elements to the TTL element.

7.1 Calculation of the operating point. Transistor VT2

Figure 7.1 - Preliminary amplifier circuit

Let's take Rk = 80 Ohm.

In addition, when choosing a transistor, you should take into account: f = 17.5 MHz.

The 2T3129A9 transistor meets these requirements. However, data on its parameters at a given current and voltage are insufficient, so we choose the following operating point:

Iko = 15mA,

Table 7.1 - Parameters of the transistor used

Let's calculate the parameters of the equivalent circuit for a given transistor using formulas 5.1 - 5.13.

rb= =10 Ohm; gb==0.1 cm, where

rb-base resistance,

rе= ==2.5 Ohm, where

re-emitter resistance.

gbe===3.96 mSm, where

gbe-base-emitter conductivity,

Ce===2.86 pF, where

Emitter capacitance,

Ri= =400 Ohm, where

7.1.1 Calculation of emitter correction

where is the feedback depth;

f in the cascade is equal to:

Let's accept then:

f in the cascade is equal to:

7.1.2 Calculation of the thermal stabilization scheme

We use emitter stabilization since a low-power transistor was chosen, in addition, emitter stabilization is already used in the calculated amplifier. The emitter thermal stabilization circuit is shown in Figure 4.1.

Calculation procedure:

1. Select the emitter voltage, divider current and supply voltage;

2. Then we will calculate.

The emitter voltage is chosen to be equal to the order. Let's choose.

The divider current is chosen to be equal to, where is the base current of the transistor and is calculated by the formula:

The supply voltage is calculated using the formula: V

The resistor values ​​are calculated using the following formulas:

In the temperature range from 0 to 50 degrees for a circuit calculated in a similar way, the resulting loss of the transistor's quiescent current, as a rule, does not exceed (10-15)%, that is, the circuit has quite acceptable stabilization.

7.2 Transistor VT1

As transistor VT1 we use transistor 2T3129A9 with the same operating point as for transistor VT2:

Iko = 15mA,

Let's take Rk = 80 Ohm.

Let's calculate the parameters of the equivalent circuit for a given transistor using formulas 5.1 - 5.13 and 7.1 - 7.3.

Sk(required)=Sk(pass)*=12=12 pF, where

Sk(required)-capacitance of the collector junction at a given Uke0,

Sk(pasp) is a reference value of the collector capacity at Uke(pasp).

rb= =10 Ohm; gb==0.1 cm, where

rb-base resistance,

Reference value of the feedback loop constant.

rе= ==2.5 Ohm, where

re-emitter resistance.

gbe===3.96 mSm, where

gbe-base-emitter conductivity,

Reference value of the static current transfer coefficient in a common emitter circuit.

Ce===2.86 pF, where

Emitter capacitance,

ft-reference value of the transistor cutoff frequency at which =1

Ri is the output resistance of the transistor,

Uke0(add), Ik0(add) - respectively, the nameplate values ​​of the permissible voltage on the collector and the constant component of the collector current.

Input resistance and input capacitance of the loading stage.

The upper limit frequency is provided that each stage has 0.75 dB of distortion. It is advisable to introduce a correction.

7.2.1 Calculation of emitter correction

The emitter correction circuit is shown in Figure 7.2.

Figure 7.2 - Intermediate stage emitter correction circuit

Emitter correction is introduced to correct frequency response distortions introduced by the transistor, increasing the amplitude of the signal at the base-emitter junction with increasing frequency of the amplified signal.

The cascade gain is described by the expression:

where is the feedback depth;

in and parameters calculated using formulas 5.7, 5.8, 5.9.

Given the value of F, the value is given by:

f in the cascade is equal to:

Let's accept then:

f in the cascade is equal to:

Switching amplifier

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Feedback amplifier

We select the operating point using the formulas: mA. UkA=Umn+Umin=V PkA=UkAIkA=100 mW Select a transistor with the parameters: Ikmax=22 mA, Ukmax=18 V, Pmax=400 mW. Such a transistor could be KT339A. This operating point corresponds to a base current of 275 μA, and a voltage Ueb = 0...

Feedback amplifier

7.2 Transistor VT1

As transistor VT1 we use transistor KT339A with the same operating point as for transistor VT2:

Let's take Rk = 100 (Ohm).

Let's calculate the parameters of the equivalent circuit for a given transistor using formulas 5.1 - 5.13 and 7.1 - 7.3.

Sk(req)=Sk(pass)*=2×=1.41 (pF), where

Sk(required)-capacitance of the collector junction at a given Uke0,

Sk(pasp) is a reference value of the collector capacity at Uke(pasp).

rb= =17.7 (Ohm); gb==0.057 (Cm), where

rb-base resistance,

Reference value of the feedback loop constant.

rе= ==6.54 (Ohm), where

re-emitter resistance.

gbe===1.51(mS), where

gbe-base-emitter conductivity,

Reference value of the static current transfer coefficient in a common emitter circuit.

Ce===0.803 (pF), where

C is the emitter capacity,

ft-reference value of the transistor cutoff frequency at which =1

Ri= =1000 (Ohm), where

Ri is the output resistance of the transistor,

Uke0(add), Ik0(add) - respectively, the nameplate values ​​of the permissible voltage on the collector and the constant component of the collector current.

– input resistance and input capacitance of the loading stage.

The upper limit frequency is provided that each stage has 0.75 dB of distortion. This value of f satisfies the technical specifications. No correction needed.

7.2.1 Calculation of the thermal stabilization scheme

As was said in paragraph 7.1.1, in this amplifier, emitter thermal stabilization is most acceptable since the KT339A transistor is low-power, and in addition, emitter stabilization is easy to implement. The emitter thermal stabilization circuit is shown in Figure 4.1.

Calculation procedure:

1. Select the emitter voltage, divider current and supply voltage;

2. Then we will calculate.

The divider current is chosen to be equal to, where is the base current of the transistor and is calculated by the formula:

The supply voltage is calculated using the formula: (V)

The resistor values ​​are calculated using the following formulas:

8. Distortion introduced by the input circuit

A schematic diagram of the cascade input circuit is shown in Fig. 8.1.

Figure 8.1 - Schematic diagram of the cascade input circuit

Provided that the input impedance of the cascade is approximated by a parallel RC circuit, the transmission coefficient of the input circuit in the high frequency region is described by the expression:

– input resistance and input capacitance of the cascade.

The value of the input circuit is calculated using formula (5.13), where the value is substituted.

9. Calculation of C f, R f, C r

The amplifier circuit diagram contains four coupling capacitors and three stabilization capacitors. The technical specifications say that the distortion of the flat top of the pulse should be no more than 5%. Therefore, each coupling capacitor should distort the flat top of the pulse by no more than 0.71%.

Flat top distortion is calculated using the formula:

where τ and is the pulse duration.

Let's calculate τ n:

τ n and C p are related by the relation:

where R l, R p - resistance to the left and right of the capacitance.

Let's calculate C r. The input resistance of the first stage is equal to the resistance of parallel-connected resistances: input transistor, Rb1 and Rb2.

R p =R in ||R b1 ||R b2 =628(Ohm)

The output resistance of the first stage is equal to the parallel connection Rк and the output resistance of the transistor Ri.

R l =Rк||Ri=90.3(Ohm)

R p =R in ||R b1 ||R b2 =620(Ohm)

R l =Rк||Ri=444(Ohm)

R p =R in ||R b1 ||R b2 =48(Ohm)

R l =Rк||Ri=71(Ohm)

R p =R n =75(Ohm)

where C p1 is the separating capacitor between Rg and the first stage, C 12 - between the first and second cascade, C 23 - between the second and third, C 3 - between the final stage and the load. By placing all other containers at 479∙10 -9 F, we will ensure a decline that is less than required.

Let's calculate R f and C f (U R Ф =1V):

10. Conclusion

In this course project, a pulse amplifier has been developed using transistors 2T602A, KT339A, and has the following technical characteristics:

Upper limit frequency 14 MHz;

Gain 64 dB;

Generator and load resistance 75 Ohm;

Supply voltage 18 V.

The amplifier circuit is shown in Figure 10.1.

Figure 10.1 - Amplifier circuit

When calculating the characteristics of the amplifier, the following software was used: MathCad, Work Bench.

1. Semiconductor devices. Medium and high power transistors: Directory / A.A. Zaitsev, A.I. Mirkin, V.V. Mokryakov and others. Edited by A.V. Golomedova.-M.: Radio and Communication, 1989.-640 p.

2. Calculation of high-frequency correction elements of amplifier stages using bipolar transistors. Educational and methodological manual on course design for students of radio engineering specialties / A.A. Titov, Tomsk: Vol. state University of Control Systems and Radioelectronics, 2002. - 45 p.

Working direct. The working line passes through the points Uke=Ek and Ik=Ek÷Rn and intersects the graphs of the output characteristics (base currents). To achieve the greatest amplitude when calculating a pulse amplifier, the operating point was chosen closer to the lowest voltage since the final stage will have a negative pulse. According to the graph of the output characteristics (Fig. 1), the values ​​IKpost = 4.5 mA, ... were found.

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The basic logical element of the series is the AND-NOT logical element. In Fig. Figure 2.3 shows diagrams of the three initial NAND TTL elements. All circuits contain three main stages: transistor input VT1, implementing the logical AND function; phase separating transistor VT2 and a push-pull output stage.

Fig 2.3.a. Schematic diagram of the basic element of the K131 series

The operating principle of the logical element of the K131 series (Fig. 2.3.a) is as follows: when a low-level signal (0 - 0.4V) is received at any of the inputs, the base-emitter junction of the multi-emitter transistor VT1 is forward-biased (unlocked), and almost the entire the current flowing through resistor R1 is branched to ground, as a result of which VT2 closes and operates in cutoff mode. The current flowing through resistor R2 saturates the base of transistor VT3. Transistors VT3 and VT4 connected according to the Darlington circuit form a composite transistor, which is an emitter follower. It functions as an output stage to amplify the signal power. A high logic level signal is generated at the output of the circuit.

If a high-level signal is supplied to all inputs, the base-emitter junction of the multi-emitter transistor VT1 is in closed mode. The current flowing through resistor R1 saturates the base of transistor VT1, as a result of which transistor VT5 is unlocked and a logical zero level is set at the output of the circuit.

Since at the moment of switching transistors VT4 and VT5 are open and a large current flows through them, a limiting resistor R5 is introduced into the circuit.

VT2, R2 and R3 form a phase separating cascade. It is necessary to turn on the output n-p-n transistors one by one. The cascade has two outputs: collector and emitter, the signals on which are antiphase.

Diodes VD1 - VD3 are protection against negative impulses.

Fig 2.3.b, c. Schematic diagrams of the basic elements of the K155 and K134 series

In microcircuits of the K155 and K134 series, the output stage is built on a non-composite repeater (only a transistor VT3) and a saturable transistor VT5 with the introduction of a level shift diode VD4(Fig. 2.3, b, c). The last two stages form a complex inverter that implements the logical NOT operation. If you introduce two phase separating stages, then the OR-NOT function is implemented.

In Fig. 2.3, and shows the basic logical element of the K131 series (foreign analogue - 74N). The basic element of the K155 series (foreign analogue - 74) is shown in Fig. 2.3, b, a in Fig. 2.3, c - element of the K134 series (foreign analogue - 74L). Now these series are practically not developed.

TTL microcircuits of the initial development began to be actively replaced by TTLSh microcircuits, which have junctions with a Schottky barrier in their internal structure. The Schottky junction transistor (Schottky transistor) is based on the well-known circuit of an unsaturated transistor switch (Fig. 2.4.a).

Figure 2.4. Explanation of the principle of obtaining a structure with a Schottky transition:
a - unsaturated transistor switch; b - transistor with a Schottky diode; c - symbol of the Schottky transistor.

To prevent the transistor from entering saturation, a diode is connected between the collector and the base. The use of a feedback diode to eliminate transistor saturation was first proposed by B. N. Kononov. However, in this case it can increase to 1 V. The ideal diode is a Schottky barrier diode. It is a contact formed between a metal and a lightly doped n-semiconductor. In a metal, only some of the electrons are free (those outside the valence zone). In a semiconductor, free electrons exist at the conduction boundary created by the addition of impurity atoms. In the absence of bias voltage, the number of electrons crossing the barrier on both sides is the same, i.e., there is no current. When forward biased, electrons have the energy to cross the potential barrier and pass into the metal. As the bias voltage increases, the barrier width decreases and the forward current increases rapidly.

When reverse biased, electrons in a semiconductor require more energy to overcome the potential barrier. For electrons in a metal, the potential barrier does not depend on the bias voltage, so a small reverse current flows, which remains practically constant until an avalanche breakdown occurs.

The current in Schottky diodes is determined by the majority carriers, so it is greater at the same forward bias and, therefore, the forward voltage drop across the Schottky diode is less than at a conventional p-n junction at a given current. Thus, the Schottky diode has a threshold opening voltage of the order of (0.2-0.3) V, in contrast to the threshold voltage of a conventional silicon diode of 0.7 V, and significantly reduces the lifetime of minority carriers in the semiconductor.

In the diagram of Fig. 2.4, b transistor VT1 is kept from going into saturation by a Shatky diode with a low opening threshold (0.2...0.3) V, so the voltage will increase slightly compared to a saturated transistor VT1. In Fig. 2.4, c shows a circuit with a “Schottky transistor”. Based on Schottky transistors, microcircuits of two main TTLSh series were produced (Fig. 2.5)

In Fig. 2.5, and shows a diagram of a high-speed logic element used as the basis of microcircuits of the K531 series (foreign analogue - 74S), (S is the initial letter of the surname of the German physicist Schottky). In this element, the emitter circuit of a phase separating cascade made on a transistor VT2, the current generator is turned on - transistor VT6 with resistors R4 And R5. This allows you to increase the performance of the logic element. Otherwise, this logical element is similar to the basic element of the K131 series. However, the introduction of Schottky transistors made it possible to reduce tzd.r doubled.

In Fig. 2.5, b shows a diagram of the basic logical element of the K555 series (foreign analogue - 74LS). In this circuit, instead of a multi-emitter transistor, a matrix of Schottky diodes is used at the input. The introduction of Shatky diodes eliminates the accumulation of excess base charges, which increase the turn-off time of the transistor, and ensures the stability of the switching time over a temperature range.

Resistor R6 of the upper arm of the output stage creates the necessary voltage at the base of the transistor VT3 to open it. To reduce power consumption when the gate is closed (), a resistor R6 connect not to the common bus, but to the output of the element.

Diode VD7, connected in series with R6 and parallel to the collector load resistor of the phase separating cascade R2, allows you to reduce the turn-on delay of the circuit by using part of the energy stored in the load capacitance to increase the transistor collector current VT1 in transition mode.

Transistor VT3 is implemented without Schottky diodes, since it operates in active mode (emitter follower).

When designing radio-electronic circuits, there are often situations when it is desirable to have transistors with parameters better than those offered by manufacturers of radio elements. In some cases, we may need a higher current gain h 21 , in others a higher value of input resistance h 11 , and in others a lower value of output conductance h 22 . To solve these problems, the option of using an electronic component, which we will discuss below, is excellent.

The circuit below is equivalent to a single n-p-n semiconductor. In this circuit, the emitter current VT1 is the base current VT2. The collector current of the composite transistor is determined mainly by the current VT2.

These are two separate bipolar transistors made on the same chip and in the same package. The load resistor is also located there in the emitter circuit of the first bipolar transistor. A Darlington transistor has the same terminals as a standard bipolar transistor - base, collector and emitter.

As we can see from the figure above, a standard compound transistor is a combination of several transistors. Depending on the level of complexity and power dissipation, there may be more than two Darlington transistors.

The main advantage of a composite transistor is a significantly higher current gain h 21, which can be approximately calculated using the formula as the product of the parameters h 21 of the transistors included in the circuit.

h 21 =h 21vt1 × h21vt2 (1)

So if the gain of the first is 120, and the second is 60, then the total gain of the Darlington circuit is equal to the product of these values ​​- 7200.

But keep in mind that parameter h21 depends quite strongly on the collector current. In the case when the base current of transistor VT2 is low enough, the collector VT1 may not be enough to provide the required value of the current gain h 21. Then by increasing h21 and, accordingly, decreasing the base current of the composite transistor, it is possible to achieve an increase in the collector current VT1. To do this, additional resistance is included between the emitter and the base of VT2, as shown in the diagram below.

Let's calculate the elements for a Darlington circuit assembled, for example, on BC846A bipolar transistors; the current VT2 is 1 mA. Then we determine its base current from the expression:

i kvt1 =i bvt2 =i kvt2 / h 21vt2 = 1×10 -3 A / 200 =5×10 -6 A

With such a low current of 5 μA, the coefficient h 21 decreases sharply and the overall coefficient may be an order of magnitude less than the calculated one. By increasing the collector current of the first transistor using an additional resistor, you can significantly gain in the value of the general parameter h 21. Since the voltage at the base is a constant (for a typical silicon three-lead semiconductor u be = 0.7 V), the resistance can be calculated from:

R = u bevt2 / i evt1 - i bvt2 = 0.7 Volt / 0.1 mA - 0.005mA = 7 kOhm

In this case, we can count on a current gain of up to 40,000. Many superbetta transistors are built according to this circuit.

Adding to the ointment, I will mention that this Darlington circuit has such a significant drawback as increased voltage Uke. If in conventional transistors the voltage is 0.2 V, then in a composite transistor it increases to a level of 0.9 V. This is due to the need to open VT1, and for this it is necessary to apply a voltage level of up to 0.7 V to its base (if during manufacture semiconductor used silicon).

As a result, in order to eliminate the mentioned drawback, minor changes were made to the classical circuit and a complementary Darlington transistor was obtained. Such a composite transistor is made up of bipolar devices, but with different conductivities: p-n-p and n-p-n.

Russian and many foreign radio amateurs call this connection the Szyklai scheme, although this scheme was called a paradoxical pair.

A typical disadvantage of composite transistors that limits their use is their low performance, so they are widely used only in low-frequency circuits. They work great in the output stages of powerful ULFs, in control circuits for engines and automation devices, and in car ignition circuits.

In circuit diagrams, a composite transistor is designated as an ordinary bipolar one. Although, rarely, such a conventionally graphical representation of a composite transistor on a circuit is used.

One of the most common is the L293D integrated assembly - these are four current amplifiers in one housing. In addition, the L293 microassembly can be defined as four transistor electronic switches.

The output stage of the microcircuit consists of a combination of Darlington and Sziklai circuits.

In addition, specialized micro-assemblies based on the Darlington circuit have also received respect from radio amateurs. For example . This integrated circuit is essentially a matrix of seven Darlington transistors. Such universal assemblies perfectly decorate amateur radio circuits and make them more functional.

The microcircuit is a seven-channel switch of powerful loads based on composite Darlington transistors with an open collector. The switches contain protection diodes, which allow switching inductive loads, such as relay coils. The ULN2004 switch is required when connecting powerful loads to CMOS logic chips.

The charging current through the battery, depending on the voltage on it (applied to the B-E junction VT1), is regulated by transistor VT1, the collector voltage of which controls the charge indicator on the LED (as charging the charge current decreases and the LED gradually goes out) and a powerful composite transistor containing VT2, VT3, VT4.

The signal requiring amplification through the preliminary ULF is fed to a preliminary differential amplifier stage built on composite VT1 and VT2. The use of a differential circuit in the amplifier stage reduces noise effects and ensures negative feedback. The OS voltage is supplied to the base of transistor VT2 from the output of the power amplifier. DC feedback is implemented through resistor R6.

When the generator is turned on, capacitor C1 begins to charge, then the zener diode opens and relay K1 operates. The capacitor begins to discharge through the resistor and the composite transistor. After a short period of time, the relay turns off and a new generator cycle begins.